Executive Profile

Rooted in the core physics of high-speed digital systems, I provide first-principles engineering consultation and forensic design analyses for complex hardware. As an IEEE Life Senior Member, my technical background includes establishing the standard industry frameworks for signal modeling, having served as technical editor for the INCITS TR-29, SSM-2, and core IBIS simulation specifications. I help clients resolve critical hardware issues by applying the same fundamental rules I helped write.

Foundational Pedigree & Academic Roots

My approach to computational physics was forged at Carnegie Mellon University, studying quantum mechanics and semiconductor physics under the guidance of Dr. A.G. Milnes (Buhl Professor of Electrical Engineering). This foundation was augmented by advanced graduate-level studies in microwave engineering and satellite dynamics, alongside developing high-precision power supply modeling on hybrid computing platforms.

This deep-physics discipline carried directly into early-stage aerospace defense infrastructure:

  • Aerospace Component Hardening: Conducted physical analysis of radiation effects on CMOS microelectronics to ensure mission survivability for AWACS radar-modem hardware.
  • Weapon System Engineering: Designed and modeled specialized antenna validation systems for the Johns Hopkins APL AEGIS Weapon System program, directly supporting early-stage Standard Missile 2 (SM-2) development.

Strategic Leadership & Theater-Level Engineering

Serving as a Lieutenant and Electronics Engineer (MOS 7601) with CEEIA-PACFO in Okinawa (1971–1973), I directed the predictive modeling and technical architecture for mission-critical military infrastructure.

  • Microwave Link Engineering: Formulated the end-to-end communication architecture linking Command Post TANGO directly to the global STRATCOM backbone network while the TANGO facility was still under early excavation.
  • Physical & Propagation Analysis: Conducted technical site surveys, calculated path-loss propagation profiles, and analyzed Fresnel zone tolerances to optimize high-frequency wave mechanics across challenging terrain.
  • Architectural Delivery: Specified the complete Bill of Materials (BOM), selected specialized antenna and radio hardware, and authored the comprehensive classified engineering data packet used to construct the link.

Industrial Architecture & Innovation

Across a 34 year tenure with NCR, LSI Logic, and QLogic, I drove the operational limits of dense silicon and hardware sub-systems.

  • The Gigabit Transition: Engaged directly with the executive and R&D architects at Ansoft Corporation in 1996 to challenge single-frequency field solver limitations. This drove the industry requirement for wideband multi-frequency matrix solvers capable of capturing frequency-dependent dispersion, group delay, and skin-effect losses.
  • Power & Display Systems: Optimized proprietary 1-bit graphics processing card architectures and engineered high-reliability switching power supplies ranging from standard 5V logic rails up to 35kV high-voltage display architectures.
  • Intellectual Property: Developed a robust portfolio of foundational patents, including Active Bus Termination methodologies to eliminate backplane reflections (US Patent 6,072,206) and multi-compartment Multichip Module (MCM) packaging frameworks (US Patent 5,369,552, US Patent 5480840 ) to isolate fundamentally incompatible operating parameters on shared substrates.

Industry Standards Leadership

As a veteran of the early EIA IBIS Open Forum futures committees and the ANSI/INCITS T10/T11 standards groups, I have spent over two decades helping define the bedrock of high-speed simulation. My work focused on the practical mechanics of the spec—developing early functional parser prototypes, building macro-language implementations for IBIS-X, and co-developing the foundational logic for the Fall_back submodel type that remains a permanent structural fixture in IBIS 8.0 today.

Beyond the documentation, I have always focused on solving the hard physics and simulation bottlenecks that EDA tools struggle to capture, including high-frequency overclocking anomalies, second-bit reduction effects, and double-edged clocking constraints. I apply that same deep, fundamental understanding of modeling mechanics to help my clients optimize multi-gigahertz semiconductor and connector topologies.


To request a comprehensive copy of my professional CV, detailed technical publications, or specific project case studies, please visit my Request Form below. I am looking forward to discussing how my background in computational physics, defense architecture, and standards leadership can support your mission-critical initiatives.

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